1. Field of the Invention
The present invention relates to a driver circuit of an electro-optical device and the electro-optical device using the driver circuit, and particularly to a driver circuit of an active matrix type electro-optical device including thin film transistors formed on an insulator and the active matrix type electro-optical device using the driver circuit. More particularly, the invention relates to a driver circuit of an active matrix type electro-optical device using a digital image signal as an image source and using a self-luminous element, such as an organic electro-luminescence (EL) element, as a pixel portion, and the active matrix type electro-optical device using the driver circuit.
2. Description of the Related Art
An EL element includes a layer (hereinafter referred to as an EL layer) containing an organic compound in which electro-luminescence (Electro Luminescence: luminescence generated when an electric filed is applied) is obtained, an anode, and a cathode. The luminescence in the organic compound includes light emission (fluorescence) at the time when a singlet excitation state returns to a ground state and light emission (phosphorescence) at the time when a triplet excitation state returns to the ground state, and the present invention can be applied to an electro-optical device using either light emission.
Incidentally, in the present specification, any layer provided between an anode and a cathode is defined as an EL layer. Specifically, the EL layer includes a light emitting layer, a hole injection layer, an electron injection layer, a hole transfer layer, an electron transfer layer, and the like. The EL element basically has a structure in which an anode/a light emitting layer/a cathode are successively laminated, and in addition to this structure, the EL element may have a structure in which an anode/a hole injection layer/a light emitting layer/a cathode or an anode/a hole injection layer/a light emitting layer/an electron transfer layer/a cathode are successively laminated.
Besides, in the present specification, an element formed of an anode, an EL layer, and a cathode is called an EL element.
In recent years, an electro-optical device in which a semiconductor thin film is formed on an insulator, especially on a glass substrate, in particular an active matrix type electro-optical device using thin film transistors (hereinafter referred to as TFTs) has become remarkably popular. The active matrix type electro-optical device using the TFTs includes hundreds of thousands to millions of TFTs arranged in matrix form, and displays an image by controlling an electric charge of each pixel.
Further, as a recent technique, a technique relating to a polysilicon TFT in which a driver circuit is simultaneously formed at a peripheral portion of a pixel portion by using TFTs in addition to pixel TFTs constituting pixels has been developed, and greatly contributes to miniaturization of a device and reduction in electric power consumption, and accordingly, the electro-optical device has become an indispensable device for a display portion of a mobile instrument the application field of which is remarkably enlarged in recent years, and so on.
Besides, as a flat panel display replacing an LCD (Liquid Crystal Display), an electro-optical device using a self-luminous material such as organic EL has attracted attention, and active research has been carried out.
FIG. 13 is a schematic view of an example of a digital system electro-optical device. A pixel portion 1307 is arranged at the center. In the pixel portion, a current supply line 1306 for supplying electric current to EL elements is arranged in addition to source signal lines and gate signal lines. A source signal line driver circuit 1301 for controlling the source signal lines is arranged at the upper side of the pixel portion. The source signal line driver circuit 1301 includes a shift register circuit 1303, a first latch circuit 1304, a second latch circuit 1305, and the like. Gate signal line driver circuits 1302 for controlling the gate signal lines are arranged at both sides of the pixel portion. Note that, in FIG. 13, although the gate signal line driver circuits 1302 are arranged at both sides of the pixel portion, they may be arranged at one side. However, the arrangement at both sides is desirable in view of driving efficiency and driving reliability.
The source signal line driver circuit 1301 has a structure as shown in FIG. 314, and includes shift register circuits (SR) 1401, first latch circuits (LAT 1) 1402, second latch circuits (LAT 2) 1403, and the like. Note that, although not shown in FIG. 14, a buffer circuit, a level shifter circuit, and the like may be arranged as the need arises.
The operation will be described in brief with reference to FIGS. 13 and 14. First, clock signals (S-CLK, S-CLKb) and a start pulse (S-SP) are inputted to the shift register circuit 1303 (expressed as SR in FIG. 14), and a sampling pulse is sequentially outputted. Subsequently, the sampling pulse is inputted to the first latch circuit 1304 (expressed as LAT 1 in FIG. 14), and digital image signals (Digital Data) inputted to the same first latch circuit 1304 are respectively held. This period is called a dot data sampling period. Here, D1 is the most significant bit (MSB) and D3 is the least significant bit (LSB). In the first latch circuit 1304, when holding of the digital image signals for one bit in one horizontal period is completed, the digital image signals held in the first latch circuit 1304 are transferred in the retrace period to the second latch circuit 1305 (expressed as LAT 2 in FIG. 14) all at once in accordance with the input of a latch signal (Latch Pulse). A period in which the digital image signals are transferred from the first latch circuit to the second latch circuit is called a line data latch period.
On the other hand, in the gate signal line side driver circuits 1302, a gate side clock signal (G-CLK) and a gate side start pulse (G-SP) are inputted to shift registers (not shown). On the basis of the input signals, the shift registers sequentially output pulses, which are outputted as gate signal line selection pulses via buffers or the like (not shown), and the gate signal lines are sequentially selected.
The data transferred to the second latch circuit 1305 of the source signal line side driver circuit 1301 are written into the pixels at the row selected by the gate signal line selection pulse.
Subsequently, driving of the pixel portion 1307 will be described. FIGS. 19A and 19B show part of the pixel portion 1307 of FIG. 13. FIG. 19A shows a matrix of 3×3 pixels. A portion surrounded by a dotted line frame 1900 is one pixel, and FIG. 19B is an enlarged view thereof. In FIG. 19B, reference numeral 1901 designates a TFT (hereinafter referred to as a switching TFT) functioning as a switching element when a signal is written into the pixel. Any polarity of an N-channel type and a P-channel type may be used for the switching TFT 1901. Reference numeral 1902 designates a TFT (hereinafter referred to as an EL driving TFT) functioning as an element (current control element) for controlling electric current to an EL element 1903. In the case where the P-channel type is used for the EL driving TFT 1902, it is arranged between an anode 1909 of the EL element 1903 and a current supply line 1907. As another constitution method, the N-channel type is used for the EL driving TFT 1902, and it can also be arranged between a cathode 1910 of the EL element 1903 and a cathode electrode 1908. However, since the grounded source is excellent for the operation of a TFT, and from the restriction in manufacture of the EL element 1903, a system is general in which the P-channel type is used for the EL driving TFT 1902, and the EL driving TFT 1902 is arranged between the anode 1909 of the EL element 1903 and the current supply line 1907, and is often adopted. Reference numeral 1904 designates a storage capacitor for holding a signal (voltage) inputted from a source signal line 1906. Although one terminal of the storage capacitor 1904 in FIG. 19B is connected to the current supply line 1907, there is also a case where a dedicated wiring line is used. A gate electrode of the switching TFT 1901 is connected to a gate signal line 1905, and a source region thereof is connected to the source signal line 1906.
Next, the operation of a circuit of an active matrix type electro-optical device will be described with reference to FIGS. 19A and 19B. First, when the gate signal line 1905 is selected, a voltage is applied to the gate electrode of the switching TFT 1901, and the switching TFT 1901 comes to have a conductive state. Then, the signal (voltage) of the source signal line 1906 is stored in the storage capacitor 1904. Since the voltage of the storage capacitor 1904 becomes a voltage VGS between the gate and source of the EL driving TFT 1902, a current corresponding to the voltage of the storage capacitor 1904 flows through the EL driving TFT 1902 and the EL element 1903. As a result, the EL element 1903 lights up.
The brightness of the EL element 1903, that is, the amount of current flowing through the EL element 1903 can be controlled by the voltage VGS of the EL driving TFT 1902. The voltage VGS is the voltage of the storage capacitor 1904, and is the signal (voltage) inputted to the source signal line 1906. That is, by controlling the signal (voltage) inputted to the source signal line 1906, the brightness of the EL element 1963 is controlled. Finally, the gate signal line 1905 is made to have the non-selected state, the gate of the switching TFT 1901 is closed, and the switching TFT 1901 is made to have the off state. At that time, the electric charge stored in the storage capacitor 1904 is held. Thus, the voltage VGS of the EL driving TFT 1902 is held as it is, and the current corresponding to the voltage VGS continues flowing through the EL driving TFT 1902 to the EL element 1903.
The driving of the EL element and so on is reported in SID99 Digest: P372: “Current Status and future of Light-Emitting Polymer Display Driven by Poly-Si TFT”, ASIA DISPLAY98: P217: “High Resolution Light Emitting Polymer Display Driven by Low Temperature Polysilicon Thin Film Transistor with Integrated Driver”, Euro Display99 Late News: P27: “3.8 Green OLED with Low Temperature Poly-Si TFT”, and the like.
Next, a system of a gradation display of an EL element will be described. An analog gradation system has a defect that it is easily affected by the fluctuation of current characteristics of EL driving TFTs. That is, when the current characteristic of an EL driving TFT becomes different, even if the same gate voltage is applied, the value of a current flowing through the EL driving TFT and the EL element is varied. As a result, the lightness of the EL element, that is, the gradation is changed.
Then, in order to reduce the influence of the fluctuation of the characteristics of the EL driving TFTs, a system called a digital gradation system has been devised. This system is such that the gradation is controlled in two states D of a state (little current flows) in which the absolute value |VGS| of the gate voltage of the EL driving TFT is not larger than a lighting start voltage, and a state (current close to the maximum flows) in which it is larger than a brightness saturation voltage. In this case, when the absolute value |VGS| of the gate voltage of the EL driving TFT is made sufficiently larger than the brightness saturation voltage, even if the current characteristics of the EL driving TFTs fluctuate, the current value approaches IMAX. Thus, the influence of the fluctuation of the EL driving TFTs can be made very small. As described above, since the gradation is controlled in the two states of the ON state (clear since maximum current flows) and the OFF state (dark since current does not flow), this system is called the digital gradation system.
However, in the case of the digital gradation system, if any change is not made, only two gradations can be displayed. Then, several techniques for realizing multiple gradations in combination with another system are proposed.
As one of the systems for realizing the multiple gradations, there is a time gradation system. The time gradation system is such a system that a time when an EL element lights up is controlled and the gradation is realized by the length of the lighting time. That is, one frame period is divided into a plurality of sub-frame periods, and the number and lengths of lighting subframes are controlled, so that the gradation is expressed.
Reference will be made to FIGS. 20A to 20D. FIGS. 20A to 20D show the driving timing of a circuit using the time gradation system in brief. In this example, a frame frequency is set to 60 Hz and 3-bit gradations are obtained by the time gradation system in the electro-optical device of VGA (640×480 pixels) standard. A circuit in FIG. 14 is used as a source signal line driver circuit.
In general, images are drawn to a screen of the electro-optical device sixty times per second. By this way, the images can be displayed without flickering (blinking) to human eyes. A period in which one image is drawn to the screen is called as one frame period.
As shown in FIG. 20A, one frame is divided into sub-frame periods the number of which is the number of gradation bits. Here, since 3 bits are used, one frame period is divided into three sub-frame periods. One sub-frame period is further divided into an address period (Ta) and a sustain (display) period (Ts) (FIG. 20B). A sustain period in SF1 will be referred to as Ts1. Also in the cases of SF2 and SF3, similarly, the sustain periods will be referred to as Ts2 and Ts3. Since the address period is a period in which image signals for one frame are written in pixels, the lengths in any sub-frame periods are equal to one another (FIG. 20C). Here, the sustain periods have a ratio of the powers of 2, such as Ts1:Ts2:Ts3=22:21:20=4:2:1.
In the address period, gate signal lines are sequentially selected from first row line, and digital image data are written to the pixels. Since VGA (640×480 pixels) standard is shown in FIG. 20C, the digital image signals are written into 480 rows. Here, processing period for one row is shown as one horizontal period.
Further, in the one horizontal period, sampling pulses are sequentially outputted from the shift register (SR) circuit in accordance with clock pulses (S-CLK, S-CLKb) and start pulses (SP), and the digital image signals are processed. This period is called as a dot data sampling period. In the VGA standard electro-optical device, there are 640 pixels in one row, the digital image signals are processed for the 640 pixels.
After the digital signals are processed for one row (640 pixels), a latch pulse is inputted in a retrace period, and the digital signals held in first latch circuits (LAT1) is transferred at once to second latch circuits (LAT2) and after that, digital image signals of one row are written into corresponding pixels simultaneously.
As a method of a gradation display, in the sustain (display) periods from Ts1 to Ts3, the EL element is controlled to have either a lighting state or a non-lighting state, so that the brightness is controlled by the length of the total lighting time in one frame period. In this example, since 23=8 lengths of lighting times can be determined by the combination of lighting sustain (display) periods, 8 gradations can be displayed. Like this, a gradation display is carried out by using the length of the lighting time.
In the case where the number of gradations is further increased, the number of partitions of one frame period has only to be increased. In the case where one frame period is divided into n sub-frames, the ratio of lengths of the sustain (display) periods becomes Ts1:Ts2: . . . Ts(n−1):Tsn=2(n−1):2(n−2): . . . 21:20, and 2n gradations can be expressed.
In a general active matrix type electro-optical device, in order to smoothly display a motion picture, as shown in FIG. 20A, a renewal of a screen display is carried out about 60 times per second. That is, it is necessary that digital image signals are supplied for every frame, and writing into pixels is carried out each time. Even if the image is a still picture, since the same signals must continue to be supplied for every frame, the driver circuit must continuously carry out the repetitive processing of the same digital image signals.
Although there is a method in which digital image signals of a still picture are once written in an external memory circuit, and thereafter, the digital image signals are supplied to the electro-optical device from the external memory circuit for every frame, in any case, there is no change in that the external memory circuit and the driver circuit must continue to operate.
Especially in a mobile instrument, reduction in electric power consumption is greatly desired. Further, in the mobile instrument, in spite of the fact that it is mostly used in a still picture mode, since the driver circuit continues to operate even at the time of a still picture display as described above, this is an obstacle to the reduction in electric power consumption.